D flip-flop means data flip-flop. It is also called delay flip-flop.
Figure(a) shows the graphic symbol of D flip-flop. It has two inputs: normal input D and a clock input.
It has two outputs say Q and its complement Q’. D flip-flop assumes the state of input D. If D(t) is 1 then Q(t+1) is also 1. Similarly if D(t) is 0 then Q(t+1) is also 0.
D flip-flop is a modified version of SR flip-flop. It can be obtained by inserting an inverter
between the inputs S and R and then assigning the symbol D to the single input.
D flip-flop introduces a unit delay in the signal input at D, hence the term delay flip-flop. It stores the data on the D input line.
Figure: Characteristic table